A typical integrated circuit memory device includes a very large number of memory locations or "cells" for storing data. For example, conventional integrated circuit memory devices may have more than a 256-Mbit capacity, i.e., may include more than 256 million memory locations. A single defective cell can cause an entire memory device to be rejected as a defective product. Accordingly, memory cell defects can significantly decrease manufacturing yield.
To improve yield, memory integrated circuits commonly include redundant memory cells that can serve as replacements for "normal" cells that are found to be defective. A conventional redundancy control circuit typically includes a redundancy decoder for decoding an input address and for addressing a redundant cell when an address of a defective memory cell is applied to the memory device.
A typical redundancy control circuit includes fuses that control access to redundant memory cells. When a regular memory cell is proved defective in a tests performed after the wafer fabrication process, appropriate fuses are blown such that the redundancy control circuit causes a redundant cell to be accessed in place of the defective memory cell. In this manner, the memory device is "repaired," allowing manufacturing yield to be improved.
Typically, the fuses employed in redundancy control circuits are conductive runs formed of polycrystalline silicon or metal in series with address or data lines. When a defective memory cell is detected, the fuse connecting the cell to an address or date line is cut so that the defective cell is isolated. However, the cutting of the fuse is typically permanent, i.e., once the fuse is cut, the disconnected defective memory cell cannot be reconnected. Also, defects typically are repaired at the wafer stage, when the fuses are accessible. Once the device is packaged, it may be difficult to make additional repairs.